The mapping of interrupt events to the code that should be run when they occur (called 'interrupt service routines' or 'event handlers') is set in a section of the code called the 'interrupt vector table' (located in a specific section of the memory). It looks like this:
Code: Select all
typedef void (* NEAR tIsrFunc)(void);
const tIsrFunc _vect[] VECT_ATTR = { // Interrupt table placed at 0xFF80
UnimplementedISR, // vector 63, 0xFF80
UnimplementedISR, // vector 62, 0xFF82
UnimplementedISR, // vector 61, 0xFF84
UnimplementedISR, // vector 60, 0xFF86
UnimplementedISR, // vector 59, 0xFF88
UnimplementedISR, // vector 58, 0xFF8A
UnimplementedISR, // vector 57, 0xFF8C - PWM emergency shut-down
UnimplementedISR, // vector 56, 0xFF8E
UnimplementedISR, // vector 55, 0xFF90
UnimplementedISR, // vector 54, 0xFF92
UnimplementedISR, // vector 53, 0xFF94
UnimplementedISR, // vector 52, 0xFF96
UnimplementedISR, // vector 51, 0xFF98
UnimplementedISR, // vector 50, 0xFF9A
UnimplementedISR, // vector 49, 0xFF9C
UnimplementedISR, // vector 48, 0xFF9E
UnimplementedISR, // vector 47, 0xFFA0
UnimplementedISR, // vector 46, 0xFFA2
UnimplementedISR, // vector 45, 0xFFA4
UnimplementedISR, // vector 44, 0xFFA6
UnimplementedISR, // vector 43, 0xFFA8
UnimplementedISR, // vector 42, 0xFFAA
UnimplementedISR, // vector 41, 0xFFAC
UnimplementedISR, // vector 40, 0xFFAE
CanTxIsr, // vector 39, 0xFFB0
CanRxIsr, // vector 38, 0xFFB2
CanRxIsr, // vector 37, 0xFFB4
UnimplementedISR, // vector 36, 0xFFB6
UnimplementedISR, // vector 35, 0xFFB8
UnimplementedISR, // vector 34, 0xFFBA
UnimplementedISR, // vector 33, 0xFFBC
UnimplementedISR, // vector 32, 0xFFBE
UnimplementedISR, // vector 31, 0xFFC0
UnimplementedISR, // vector 30, 0xFFC2
UnimplementedISR, // vector 29, 0xFFC4
UnimplementedISR, // vector 28, 0xFFC6
UnimplementedISR, // vector 27, 0xFFC8
UnimplementedISR, // vector 26, 0xFFCA
UnimplementedISR, // vector 25, 0xFFCC
UnimplementedISR, // vector 24, 0xFFCE
UnimplementedISR, // vector 23, 0xFFD0
UnimplementedISR, // vector 22, 0xFFD2
UnimplementedISR, // vector 21, 0xFFD4
ISR_SCI_Comm, // vector 20, 0xFFD6
UnimplementedISR, // vector 19, 0xFFD8
UnimplementedISR, // vector 18, 0xFFDA
UnimplementedISR, // vector 17, 0xFFBC
Timer_Overflow_ISR, // vector 16, 0xFFDE
UnimplementedISR, // vector 15, 0xFFE0
UnimplementedISR, // vector 14, 0xFFE2
ISS_timer, // vector 13, 0xFFE4
UnimplementedISR, // vector 12, 0xFFE6
UnimplementedISR, // vector 11, 0xFFE8
UnimplementedISR, // vector 10, 0xFFEA
UnimplementedISR, // vector 09, 0xFFEC
VSS_timer, // vector 08, 0xFFEE
Timer_Clock_ISR, // vector 07, 0xFFF0 - RTI
UnimplementedISR, // vector 06, 0xFFF2 - IRQ (PE1)
UnimplementedISR, // vector 05, 0xFFF4 - XIRQ (PE0)
UnimplementedISR, // vector 04, 0xFFF6 - SWI
UnimplementedISR, // vector 03, 0xFFF8
UnimplementedISR, // vector 02, 0xFFFA - COP failure reset
UnimplementedISR, // vector 01, 0xFFFC - Clock monitor failure reset
_Startup // Reset vector, 0xFFFE
};
'. Other, easier to read, sources of more general info are:
Lance.
